Stability of blended organic semiconductors under .. (BLEND)
Stability of blended organic semiconductors under various environments
Date du début: 1 sept. 2013,
Date de fin: 31 août 2015
Electronics is a very fast developing field of industry. The main trends, especially in commercial products, have been for several years smaller size, increased amount of functionality, higher reliability, and lower price. There is significant, competitive electronics industry in Europe. However, it faces global pressures and to success it needs constantly solutions for better products and lower prices. Organic semiconductors offer several advantages over inorganic semiconductors such as silicon, including lightness, mechanical robustness and ease of manufacturing which makes them interesting alternatives for new innovative products. However, these materials suffer from problems associated with stability resulting severe use restrictions due to reliability issues. To solve this problem far more attention in the research associated with organic semiconducting materials should be directed on their stability and how to improve it.In this project organic semiconductor materials blended with more stable commodity insulating polymer materials are studied to increase the overall stability of the resulting structure. Such blends have already been processed and electronically characterised in the host institution, and it has been shown that good electrical properties can be achieved provided suitable processing protocols are selected. The aim of the project is to explore whether the stability of the organic semiconducting materials can be improved by blending. Another advantage by blending may be cost reduction due to low cost of the bulk commodity polymers. Within the project blended organic semiconducting systems are processed, organic photovoltaics (OPV) and thin-film transistors (FETs) are manufactured and characterised before elucidating the stability of both material and devices. To this end, focus will be on developing systematic environmental testing procedures for such architectures.
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