Ultra-low voltage/power operation is expected to be an important requirement for future nanoelectronics allowing more dense and fast circuits on one hand and enabling the operation of energy efficient intelligent autonomous systems on the other. In present day devices quite a lot of power is consumed during switching since it requires a minimum bias of 60 mV on the gate to overcome a potential barrier and increase the transistor current by a decade, a process which is fundamentally limited by thermal Boltzmann statistics. We propose the development of novel negative capacitance “smart” gates with a positive feedback and internal amplification to overcome the “Boltzmann tyranny” and obtain steeper slope “green” transistors capable of operating at very low voltage. Metallic systems with a low density of states could provide the required dominant negative contributions to the capacitance due to strong carrier correlation effects. Such metallic systems made of 2D Dirac fermions with linear dispersion bands are supported in graphene and on the surface of the newly discovered topological insulators having the very interesting property that they offer a nearly zero density of states at the band crossing near the charge neutral point. We propose here the graphene and Bi2Se3-based topological insulators as the key components of the targeted “smart” gates. We aim at developing complex gate structures facing the challenges of growth of high purity and high crystalline quality graphene and Bi2Se3 thin films in combination with conventional dielectrics and metals on Si semiconductor in an effort to obtain the required properties and ensure their robust functionality at room temperature. Possible negative capacitance effects will be investigated in terms of generic capacitor electrical characterization, while transistor devices with optimum smart gates will be fabricated to prove the principle of steep slope switching.