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Rendering FPGAs to Multi-Core Embedded Computing (REFLECT)
Rendering FPGAs to Multi-Core Embedded Computing
(REFLECT)
Date du début: 1 janv. 2010,
Date de fin: 31 déc. 2012
PROJET
TERMINÉ
Description
To develop an approach and a tool-chain to improve productivity by accelerating development cycles of reconfigurable systems by more than two orders of magnitude
The ever increasing need for additional product functionalities, safety, and security, drives many product suppliers towards the need for more and more platform performance. For instance, next-generation UAVs (unmanned aerial vehicles) are expected to be much more complex in terms of sensing. As such, the analysis and decision-making processes will lead to a higher performance requirement, together with the need of low cost solutions. Another example is audio encoding, where better performance and improved encoding quality are features of major interest. While these requirements are met by implementing as many functions as possible in hardware it is certainly desirable to host product functionalities on as few hardware platforms as possible in order to reduce size, weight and power of products.Reconfiguration has been recognized as a key technique to achieve these goals. However, designing reconfigurable systems is an extremely cumbersome and error-prone process. As a result, the potential of reconfiguration is only achieved at high design effort and cost.REFLECT aims at developing an approach and a tool-chain to improve productivity by accelerating development cycles of reconfigurable systems by more than two orders of magnitude.
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