In today’s ware house sized computers the interconnection of individual processing cores is limiting the total system performance. Interconnects already take up about 50% of the systems power consumption and this value increases with system complexity. Optical interconnects are nowadays employed for rack-to-rack communication to overcome this “interconnect bottleneck” by reducing space requirements and power consumption. In the future, such optical technologies must penetrate deeper in the system design and be applied for chip-to-chip, or even on-chip interconnection to sustain the exponential growth of computer performance. New approaches are needed to meet the extreme requirements in integration density, power consumption and cost for optical interconnects in future high performance computers. By exploring the limits of miniaturization and energy efficiency in integrated active optical components we want to demonstrate a compact optical link and assess the potential of nanophotonic technology for integrated optical chip-to-chip or even on-chip interconnects. We will employ metallo-dielectric cavities to shrink the footprint of devices, which in turn will increase operation speed, reduce power consumption and allow efficient cooling of the highly integrated devices through the metal surfaces. We will develop a first waveguide coupled nanolaser, demonstrate optical detectors with record small footprint and demonstrate for the first time an optical interconnect that satisfies the requirements of future computing systems with respect to transmission density, power consumption and device size. The acquired techniques will directly contribute to the development of a photonic technology platform. Such innovations in photonic technology are essential to overcome the interconnect bottleneck and enable next generation computing technology.