Water immersion lithography has been widely accepted as patterning technology for the 45nm technology node, but solutions for the patterning of 32nm and 22nm technology nodes are not clear yet.EUV lithography is not yet available for industrial use, in spite of the impressive progresses registered till now, while multiple beam e beam lithography is still in development. Double patterning seems to be the only viable option to support the development of future process generations in a cost effective way and within the time limits defined by ITRS roadmap.Its main advantage consists in enabling the definition of structures beyond resolution capability of existing lithographic tools, without drastic changes in manufacturing infrastructures or huge investments. Two alternative approaches are possible, both based on existing immersion scanners:Double exposure, which implies two subsequent exposure steps, and the use of different combinations of hard masks or innovative resist materials and development process;Pitch doubling based on a single lithography exposure followed by the formation of spacers, by material deposition and etch-back, also in combination with CMP.Both approaches are being actively investigated, but they are still far from maturity. Among the problems to be solved there is the control of mask to mask alignment, for double exposure, and the control of the thickness of deposited layers, of defects and of profiles, for pitch doubling. Common concerns are cost, size control and the partitioning of the design. The pitch doubling approach is the more advanced, specially for memories, while double exposure could have a broader application, but will require improvement to equipment.The consortium includes all required competences to develop all elements of the supply chain required to bring double patterning to industrial maturity, in order to support 32nm and 22nm node mass production.