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Efficient Silicon Multi-Chip System-in-Package Integration - Reliability, Failure Analysis and Test (ESIP)
Date du début: 1 mai 2010, Date de fin: 1 avr. 2013,
The ENIAC JU project ESiP is addressing the issues of reliability, failure analysis and testing in innovative system-in-package (SiP) solutions. Highly integrated systems with greater miniaturisation and increased functionality open new markets and improve the quality of life through a wide range of applications. In particular, higher systems integration technologies using multi-chip packaging, th ...
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